As a technology for manufacturing a laminated semiconductor device by bonding two or more semiconductor chips, a wiring layer is formed on a bonding surface between both chips and the chips are affixed together at the wiring layer on the bonding surface so as to be electrically connected.
In the case of a solid-state image pickup element, a configuration is adopted in which, by affixing a wafer having a photoelectric conversion unit formed thereon and a wafer including a circuit configured to perform signal processing, via an electrical connection unit, a signal is transmitted to a signal processing circuit from the photoelectric conversion unit via a wiring unit on an affixed surface.
As such a technology for the solid-state image pickup element, there is proposed a technology in which a true connection wiring unit electrically connected to a portion where a photoelectric conversion unit is formed and a dummy wire not electrically connected a portion other than the portion where the photoelectric conversion unit is formed are formed on an affixed surface and the true connection wiring unit and the dummy wire are arranged at the same interval, such that yield at the time of manufacture is improved (refer to Patent Document 1).